Draft for preliminary discussion.  Goal is to develop
checklist and documentation.  Timeframe is open.

Original draft: Lynne Green, Sept 2009


1) Parser(s) pass
	IBIS file call calls model file in same directory
	Parsers available for SPICE, HSPICE, *-AMS, tool-specific languages

2) Data Checks
	IBIS language call matches model file's language
	Parameters passed to model file are accepted by (used in) model file
	Port/Interconnect mapping to physical comopnent or structure
	Parameters passed with correct names and resonable values
	[External Circuit] and keywords have correct data
	[External Circuit] has correct pin/port mapping
	Differential checks (such as, polarity same for [model], [component] and [diff pin])

3) Simulation with any driver and/or resistive load, as appropriate
	Correct DC operating point
	Correct response in time domain, if active
	Correct response in frequency domain, if passive

4) Comparison of time or frequency domain simulation to bench test data

5) Extend comparison if model includes additional effects
	Core Icc
	SSN and Power integrity
	Thermal feedback
	etc.